Lena original Lena filtered Boat original Boat filtered Comb trigger-payload w/o memory Comb trigger-payload with memory Einstein original Seq trigger-paylaod with memory Trojan overview

This project implements Hardware Trojans in 10 of the Synthesizable SystemC benchmarks from the S2Cbench Benchmark suite with different trigger mechanisms and payloads. Under the normal verificiation stage, the trojan will not be activated, but when using other inputs (e.g. other images in the sobel and disparity estimator designs) the Trojan will trigger. The images show the effect of the differnet Hardware Trojan in the sobel filter example.
A repository of RT-level benchmarks with different types of Hardware Trojan is available at the Trust-hub. Unfortunately this benchmark suite misses completely the behavioral abstraction level. This work aims at bridging this gap by provided the first behavioral synthesis benchmark suite in a common language supported by all major HLS vendors (SystemC) which covers most types of Hardware Trojan. The designs have been created in such a way that the Hardware Trojan will always be executed when not triggered, thus, cannot be found using standard software profiling techniques. [download].

Main structure File list Brought by DARClab

S2CBench v.2.0 provides 18 programs written in synthesizable SystemC language. Each benchmark is designed for specific domains such as multimedia, digital signal processing, security, image processing, etc. The programs are provided with the objective to enable researchers analyze their innovative algorithms and techniques and help users compare the quality of results of state of the art commercial High Level Synthesis tools available in industry. You can log in to our Youtube channel to watch some videos about S2CBench and SystemC in general DARClabify. The latest S2CBench v2.0 version can be downloaded from here [download].

To know more about the designs and why they were included in the benchmark suite you can read the following academic paper: B. Carrion Schafer and A. Mahapatra, "S2CBench:Synthesizable SystemC Benchmark Suite for High-Level Synthesis ", IEEE Embedded Systems Letters, 2014.

Main structure DE1 Board AS2Cbench GUI

Accelerated version of the Synthesizable SystemC benchmark suite (S2CBench), mapped onto Terasic's DE1-SoC FPGA board. Testbench runs on the ARM Cortex-A processor DUT is mapped onto the programmable logic. The latest AS2CBench v1.0 benchmarks can be downloaded from here [download].

A GUI for the AS2Cbenchs have also be created to allow its easier use. The package comes with a .rbf (raw bianry file) which when copied to the SD card automatically configures the FPGA when booting it with 10 of the AS2Cbench benchmarks. The GUI with the instructions on how to use it can be downloaded from AS2CBench GUI v1.0. A video with instructions on how to set the benchmarks up can be found at our YouTube channel here.

List of files in Project

This project contains a simple SystemC example to illustrate how SystemC is able to model concurrency using threads and wait statements. The testbench contains to main threads (send data and receive data) and the UUT receives this data and manipulates it to return it to the testbench's receive threads. Cout/printf statements are placed in the source code in order to illustrate in which thread the program is at any time. A video tutorial of this design can be found at our YouTube channel here [video]. To learn how to download and install SystemC you can watch the following video tutorial [video].

The project files, include the SystemC files (main, testbench and main computation part) and a Makefile and can be downloaded here [download].

ANN structure ANN in SystemC QoR of autoencoder

Artificial Neural Networks (ANNs) are algorithms that belongs to the group of Artificial Intelligence (AI) because they have the capability of learning. Their name comes from the fact that they are biologically inspired on a simple model of a neuron, connected in a network similar as our brain does. A parametrizable SystemC implementation of an autoencoder ANN has been implemented in SystemC, where the training part is done at the testbench (SW) and the ANN implementation as the UUT, which is also synthesizable. The design can be downloaded from [download].

DSE Exploration Framework Run your own explorer C-based VLSI design using HLS allows the automatic generation of micro-architectures with unique trade-offs automatically, called design space exploration (DSE). We have released an design space exploration framework based on QT, which means that it works on Windows and Linux. This framework is extensible and allows anyone creating their own explorer and interfacing it with the framework and visualize and measure the quality of the exploration results. DSEframe v1.0 can be downloaded from [Github].