Benjamin Carrion Schaefer
Associate Professor
Assistant Dean for Graduate Student Success
University of Texas at Dallas
800 W Campbell Rd
Richardson, TX, 75080
Office: ECSN Suite 2.718
Phone: 972-883-4531
Email: schaferb [at] utdallas [dot] edu
I am an associate professor at the Department of Electrical and Computer Engineering, UT Dallas, where I lead the Design Automation and Reconfigurable Computing laboratory. We mainly work on system-level, high-level synthesis and programming methodologies for VLSI computing systems. I received my PhD in Electrical Engineering from the University of Birmigham, UK in 2003.
I am the founder and director of highX Technologies. A company dedicated to making hardware design easier by providing Behavioral IPs written in ANSI C and SystemC optimized for High-Level Synthesis (HLS). We are also working different SW platforms to allow the easy customization of these BIPs. We also offer HLS training and consulting services.
Research
I am interested in design methodologies for VLSI and embedded systems, to optimze application-specific processes. My work deals with modeling, analysis, synthesis, optimization and implementation of VLSI systems. and tools for automating the design process. The area offers an interesting blend of theory and practice: real-world applications give rise to research problems, for which solutions are developed using a combination of analytical and experimental techniques.
Currently, my students and I are working on exploiting the benefits of raising the level of abstraction in VLSI through the use of High-Level Synthesis (HLS) and addressing any shortcomings of this new technology.
Teaching
2024/2025 UT Dallas
Design and Analysis of Reconfigurable Systems, Graduate, Fall
2023/2024 UT Dallas
Computer Architecture, Undergraduate, Summer
Computer Architecture, Graduate, Fall
Design and Analysis of Reconfigurable Systems, Graduate, Fall
2022/2023 UT Dallas
Computer Architecture, Undergraduate, Summer
Computer Architecture, Graduate, Fall
Embedded Systems, Undergraduate, Fall
2021/2022 UT Dallas
Computer Architecture, Undergraduate, Summer
Embedded Systems, Undergraduate, Spring
Computer Architecture, Graduate, Fall
High-Level Synthesis: Design and Verification, Graduate, Fall
2020/2021 UT Dallas
Embedded Systems, Undergraduate, Spring
High-Level Synthesis for VLSI, Graduate, Spring
Computer Architecture, Graduate, Fall
2019/2020 UT Dallas
Embedded Systems, Undergraduate, Spring
Computer Architecture, Graduate, Fall
High-Level Synthesis for VLSI, Graduate, Fall
2018/2019 UT Dallas
Embedded Systems, Undergraduate, Spring
Computer Architecture, Graduate, Fall
High-Level Synthesis for VLSI, Graduate, Fall
2017/2018 UT Dallas
Computer Architecture, Graduate, Spring
Embedded Microprocesor Systems, Undergraduate, Spring
Computer Architecture, Graduate, Fall
2016/2017 UT Dallas
Computer Architecture, Graduate, Spring
2015/2016 PolyU, HK
Introduction to VLSI Design and CAD, Undergraduate, Spring
VLSI System Design, Graduate, Fall
2014/2015 PolyU, HK
VLSI System Design, Graduate, Spring
Computer Systems Fundamentals, Undergraduate, Spring
Digital and Computer Systems, Undergraduate, Fall
Introduction to VLSI Design and CAD, Undergraduate, Fall
2014/2014 PolyU, HK
Computer Systems Fundamentals, Undergraduate, Spring
Introduction to VLSI Design and CAD, Undergraduate, Spring
Digital and Computer Systems, Undergraduate, Fall
VLSI System Design, Graduate, Fall
2013/2014 PolyU, HK
Computer Systems Fundamentals, Undergraduate, Spring
Introduction to VLSI Design and CAD, Undergraduate, Spring
Professional Activities
Associate Editor:
IEEE Transaction on Sustainable Computing (2022-present)
Elsevier Integration, the VLSI Journal (2015-2022)
Conference Chair :
42nd IEEE International Conference on Computer Design- ICCD 2024
17th IEEE Dallas Circuits and Systems conference general chair- DCAS 2024
AxC22,7th Workshop on Approximate Computing, 2022, (co-located with DAC)
ESLsyn, 2014, (co-located with DAC)
Program Committee Member:
ASP-DAC technical program Committee (2022-present) – Asia South Pacific Design Automation Conference
DATE technical program committee (2023) – International Symposium on Field-Programmable Custom Computing Machines
FCCM technical program Committee (2022-present) – Asia South Pacific Design Automation Conference
GLSVLSI technical program committee (2023) – Great Lakes Symposium on VLSI
ICCD technical program committee (2021-present) – International Conference on Computer Design
Past:
ASAP technical program Committee (2019-2022) – Application-Specific Systems, Architectures and Processors
ASP-DAC technical program committee (2015-2017) – Asia-South Pacific Design Automation Conference
DAC user track technical program committee (2010-2012) – DAC User Track
DAC technical program committee (2018-2021) – Design Automation Conference
DATE technical program committee (2014, 2019-2021) – Design and Test Conference Europe
ESLSyn technical program committee (2011-2015) – Electronic System Level Synthesis Conference
FPL technical program committee (2015-2022) – Field Programmable Logic Conference
GLSVLSI technical program committee (2018-2021) – Great Lakes Symposium on VLSI
ICCAD technical program committee (2019-2021) – International Conference On Computer Aided Design
International Conference of Reconfigurable Computing and FPGAs technical program committee (2003~2006) – Reconfig
International Conference on Hardware/Software Co-design and System Synthesis technical program committee (CASES 2006) – CASES
OSCI (Accellera) member of standardization committee of SystemC’s synthesizable subset (2007~2012) – SystemC Synthesizable Working Group (SWG)
SBCCI technical program committee (2016-2018) – Symposium on Integrated Circuits and Systems Design
Students and Alumni
Current graduate students:
Baharealsadat Parchamdar (PhD candidate 2021 – UTD) – Domain Specific Architecture design
Chaitali Gajanan Sathe (PhD candidate 2021- UTD) – Hardware Security
Sabrina Ahmed (PhD candidate 2022 – UTD) – Sustainable Computing
Victoria Gammenthaler (PhD candidate 2024 – UTD) – ML for VLSI Design
Daksith Chandrasekera (PhD candidate 2024 – UTD)
Dearly Departed :
Md Imtiaz Rashid (PhD UTD, 2024) – Modernizing HW Assets. Job after graduating : Postdoc at the University of Florida, USA.
Qilin Si (PhD UTD, 2023) – Design and Optimization of Behavioral ASIPs. Job after graduating : NVIDIA, USA.
Prattay Chowdhury (PhD UTD, 2022) – From Single Component to System-Level Approximate Computing. Job after graduating : Qualcomm, USA.
Zi Wang (PhD UTD, 2021) – Efficient High-Level Synthesis Design Space Exploration. Job after graduating : Cadence, USA.
Bo Hu (PhD UTD, 2021- co-supervised with Prof. Carl Sechen) – Thermal-aware Placement and High-Level Synthesis for Hardware Security. Job after graduating : Apple, USA.
Anjana Balachandran (PhD PolyU, 2020) – On the Robustness of Behavioural Circuit Design: From Fault-Tolerance to Hardware Security. Job after graduating : Huawei, Hong Kong.
Jianqi Chen (PhD UTD, 2020) – Leveraging the Advantages of High-level Synthesis: From Hardware Security to Low-power Design. Job after graduating : Cirrus Logic, USA.
Zhiqi Zhu (PhD UTD, 2020) – Reducing the Complexity of Fault-tolerant HW Accelerators. Job after graduating : Nubis Communications, USA.
Farah Naz Taher (PhD UTD, 2019) – Fault Tolerance in Hardware Accelerators: Detection and Mitigation. Job after graduating: Raytheon, USA.
Siyuan Xu (PhD UTD, 2019) – Towards Robust Approximate Computing. Job after graduating: Mathworks, USA.
Shuangnan Liu (PhD PolyU, 2019) – Design and Optimization of Behavioral Dataflows. Job after graduating: Cadence, China.
Anushree Mahapatra (PhD PolyU, 2018) – On Abstraction Methodologies for RTL-based VLSI Designs to Maximize HLS Design Space Exploration. Job after graduating: ASTRI, Hong Kong.
Nandeesh Veeranna (PhD PolyU, 2017) – Behavioral Intellectual Property (BIP) protection. Job after graduating: Postdoc at NTU, Singapore.
Yidi Liu (MPhil PolyU, 2015) – Multi processes HW accelleration. HW/SW Co-design. Job after graduating: AppoTech, Hong Kong.
Valliyappan Senthilkumar (MS UTD, 2023) – Design and Optimization of ANNs. Job after graduating: Marvell, USA.
Amir H. Torabi (MS UTD, 2023) – Automatic Measuring the Quality of High-Level Synthesis. Job after graduating: PhD candidate at UT Dallas.
Santosh Shetty (MS UTD, 2020) – Behavioral SoC Generation. Job after graduating: AMD, India.
Akshay Raju Krishnani (MS UTD, 2020) – In-situ Implementation and Training of CNNs on FPGAs. Job after gradudating: Intel, USA.
Yiheng Gao (MS UTD, 2020) – Effective High-Level Synthesis Design Space Exploration through a Novel Cost Function Formulation. Job after gradudating: Nokia, USA.
Rohit Sreekmuar (MS UTD, 2020) – Behavioral Bespoke Processors. Job after gradudating: Amazon, USA.
Maheshwaran Ramesh Babu (MS UTD, 2019) – FPGA acceleration of Hardware Diversity Computation. Job after graduating: Intel, USA.
Himanshu Patra (MS UTD, 2019) – Behavioral Language Converters to improve HLS Quality of Results. Job after graduating: Intel, USA.
Songseok Choi (MS UTD, 2018) – Automating FPGA-based Hardware Acceleration. Job after graduating: Cadence, Korea.
Vinay Nagarad Dasavandi Krishnamurth (MS UTD, 2018) – Approximate Computing through bitwidth Optimization. Job after graduating: Delphi, USA.
Monica Jayasheel Gowda (MS UTD, 2018) – High-Level Synthesis Design Space Exploration. Job after graduating: Microchip, USA
Mihir Shah (MS, UTD, 2018)- Flexible Partial Reconfiguration Based Design Architecture for Dataflow Computing. Job after graduating: Varex Imaging Corp., USA.
Susmitha Gogineni (MS, UTD, 2017)- Efficient Hardware Acceleration with OpenCL. Job after graduating: Texas Instruments, TX, USA.
Siyuan Xu (MSc, PolyU 2015) – HW/SW Co-design. Job after graduating: PhD candidate at UT Dallas, TX, USA.
Zhendong Gao (MSc, PolyU, 2015)- Speech visualization using FPGAs. Job after graduating: PCCW, Hong Kong.
Jieshi Chen (MS, PolyU, 2015) – HW-based feature detection. Job after graduating: DJI, Shenzhen.
Yu Li (MSc, PolyU, 2014)-FPGA based gaming console
Xiaotong Li (MS, PolyU, 2014) – Temperature triggered HW Trojan Detection for Behavioral IPs . Job after graduating: TCL, China.
Mostafa Kishanifarahani (RA) – VLSI fault tolerance
If you are currently a UTD graduate or undergraduate student and are interested in working on one of the research projects in our group, feel free to email me to discuss your interests