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The aim of this group is to do significant research in the areas of VLSI Design Automation and Reconfigurable Computing. Our goal is finding important problems, formulating the problems systematically, and solving them effectively. The target of our optimizations covers both hardware and software. This includes but is not limited to Electronic Design Automation (EDA) problems such as hardware synthesis problems (from system down to circuit level) and embedded software (compiler, operating system) optimization problems. One of the key aspects of our lab is that we only use high-level languages to build hardware circuits. The ultimate goal of the lab is to fully move away from low-level hardware description languages like Verilog or VHDL and only use C/C++, SystemC, Python or Matlab. 

We do put a big emphasis on the demonstration of the solutions and aim at releasing the software and hardware implementation to the community. For this we relay heavily on FPGAs, thus, the name of our lab.